November 2012

SESUB modules for smartphones

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SESUB (semiconductor embedded in substrate) module technology successfully leverages TDK and EPCOS know-how and enables a technological breakthrough: Never before was it possible to pack so many functions into such a small space as with TDK SESUB modules.

One of today’s prime drivers for miniaturization is the smartphone. For one thing, power consumption in these devices is increasing sharply. Not only do the microprocessors need more power, but on-display activity for all the extra features demanded by customers is also on the rise. As a result, smartphones require even larger batteries than ever, while the rest of the components have to get smaller.


Moreover, with the next-generation mobile standard LTE (Long-Term Evolution), smartphones must support even more frequency bands in addition to bands for existing 2G and 3G networks, driving the need for additional miniaturized components such as SAW filters, duplexers, inductors, capacitors, power amplifiers, etc. Smartphone manufacturers must integrate additional functions without influencing the size and, most importantly, the thickness of the phone. Against this background, the insertion height of miniaturized components has become one of the decisive factors in creating competitive products. This is where TDK’s SESUB technology comes into play.

SESUB – modularization for miniaturization
SESUB is a high-end substrate technology where semiconductor chips, which are thinned down to as low as 50 µm, are embedded in the substrate with a patented process. TDK has a strong IP portfolio for all of the processes needed to embed complex components. The whole thickness of the substrate including the integrated semiconductor chips is just 300 µm (Figure 1).

Multiple chips can be embedded side by side to produce a highly integrated module enabling a multifunctional yet highly compact solution for the design and development of the next generation of consumer-oriented products. In addition to the embedded elements, further discrete components (both passive and semiconductor) can be mounted on the top of the substrate. Looking forward, an even higher degree of integration will be reached in the future by embedding thin passive components as well.

Figure 1: Cross-section of SESUB substrate

Four extremely thin substrate stacks feature micro-interconnection structures and vias and have a total height of only 300 µm. ICs with a large number of fine-pitch I/Os can be embedded in the SESUB substrate.


Excellent thermal and electrical performance
The compact construction of SESUB delivers excellent thermal attributes due to the fact that the IC is completely embedded. All surfaces of the chip are in full contact with the laminate, which optimizes the heat transfer from the semiconductor into the substrate layers. These layers themselves contain the copper micro-interconnection grids, which provide for a very homogenous and efficient heat dissipation. In particular, this superior thermal performance is important for applications in the area of power management, transceivers, processors, and the power amplifier – or all the main components of a smartphone. The comparison between discrete-packaged power semiconductor chips with the same IC embedded in SESUB, results in around 7 K lower chip surface temperature.

The excellent thermal performance achieved in SESUB can potentially enable more cost-efficient semiconductor designs. Embedding the chips also leads to improved EMC performance due to the shielding effect of the metal layers inside the SESUB substrate. The compact design of the SESUB module and the shorter line connections within the substrate layers lead to improved parasitics and thus support better system performance. A further advantage is the fixed developed subsystem leading to lower design efforts of our customers and robust designs. In addition, customers benefit from the ability to create robust designs with less effort.

Eliminating additional redistribution layers
SESUB offers an elegant solution to one of the major challenges facing highly complex future semiconductors: how to route their large number of fine-pitch I/Os to the PCBs. The semiconductor industry is working steadily on new technologies with ever smaller process geometries. The trend for RF applications is from 65 nm to 40 nm and for processors down to as small as 28 nm. This means that the connection points of the chips are becoming smaller and smaller (80 µm or 50 µm pad pitch).

The standard solution for semiconductor chips is to utilize multiple costly redistribution layers (RDLs) to route these pads to the significantly larger pad pitch of the smartphone PCB (350 µm to 500 µm). In SESUB such redistribution is accomplished within the substrate (Figure 2). This is made possible by extremely thin substrate stacks and micro-interconnection structures and vias. In this way, the ICs can be designed without their own RDLs, potentially leading to smaller ICs. Thus, modules and SIPs can be implemented with considerably smaller dimensions. In particular, the insertion height can be reduced by around 35 percent, e.g. from 1.55 mm to no more than 1.0 mm. This makes SESUB an ideal 3D platform for miniature module solutions with high IC content.

Figure 2: SESUB module integrates redistribution layers

In a semiconductor chip (left) the IC circuit is found in the top layer which carries the I/Os. Up to several redistribution layers underneath are needed to connect the I/Os to the BGA layer on the bottom. In the SESUB module (right) the IC is embedded within the substrate and the I/Os are routed optimally through the substrate layers to the BGA on the bottom.


Versatile integration platform
One of the first modules to be developed in SESUB technology is a miniaturized power management unit (PMU), which is designed for use in mobile phones and compact consumer electronics devices (Figure 3). Forming the heart of the PMU module are two embedded ICs, which control all the power functions of a smartphone. The compact module has a footprint of just 11 mm × 11 mm, which is 60 percent smaller than a comparable discrete solution. Its slim insertion height of 1.63 mm, including shielding, is in line with the need for low-profile designs in smartphones. In addition, the module features:

– Five 4.4-MHz buck converters
– Switch-mode charger with power bypass mode up to 4 A
– Reverse boost converter for the camera flash LED (up to 2 A) and support for USB on-the-go
– 23 low-noise, high PSRR (power supply rejection ratio) low dropout regulators
– RTC (real-time clock) with 32 kHz crystal
– 19.2 MHz/26.0 MHz clock generator with five outputs

Figure 3: SESUB power management unit

Miniaturized PMU modules contain two embedded ICs to control all the power functions of a smartphone.

A further module developed in SESUB technology is an ultra compact quad-band connectivity module that combines wireless LAN, Bluetooth, FM radio and GPS functionality in a single component and offers excellent EMC results.

Figure 4 shows the laminate module with the connectivity IC mounted on top. In the SESUB module the connectivity IC is embedded into the substrate and takes up about 40 percent of the module size. The PA FEM, RF filters and SMDs are mounted on top of the module. With its dimensions of just 8.5 × 7.0 × 1.4 mm³ the SESUB module features a very low insertion height and a footprint that is more than 45 percent smaller than comparable modules designed in conventional laminate technology.

Figure 4: Quad-band connectivity module

The new quad-band connectivity module for wireless LAN, Bluetooth, FM radio and GPS has the connectivity IC embedded into the substrate. The PA front-end module and passive components are mounted on top.

Designers and manufacturers of smartphones stand to benefit not only from the pioneering SESUB module technology, which is based on the competence of TDK and EPCOS. TDK’s advanced thin-film technology also enables the manufacture of extremely low-profile discrete components for smartphone applications. See our article “Thin-film RF components for smartphones”.

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