NTC thermistors for power semiconductors
Integrated temperature protection
New EPCOS NTC thermistors with a wafer-based manufacturing process can be integrated very simply into power semiconductors. This allows a reliable temperature monitoring function to be implemented that protects electronic systems from expensive failures or destruction.
Conventional ceramic-based NTC (negative temperature coefficient) thermistors are ideal and simultaneously cost-effective components for temperature measurement. These products have been manufactured for many years by EPCOS in leaded versions or as SMT components in the most common EIA case sizes such as 0402, 0603, 0805, etc. NTC thermistors are used in a wide range of applications, in automotive and industrial electronics as well as in domestic appliances, for example, in refrigerators, washing machines, dishwashers, and cookers.
Compact SMT versions of these NTC thermistors are increasingly being integrated directly into power semiconductors such as IGBT modules for overtemperature protection. However, conventional versions give rise to certain difficulties in process management. These include:
- The terminals must be designed as pads on the semiconductor substrate for the solder or bonding process.
- Increased thermal resistances can occur between substrate and NTC thermistor if the component is not in a completely flat position.
- Differing temperature coefficients of substrate and NTC thermistor can lead to fracturing.
- The thermal and mechanical stresses occurring in the injection molding process used for the semiconductor can also lead to the thermistor fracturing.
These problems can be partially solved using complex and thus costly process technology. However, the risk of fracture formation during the operation of the semiconductor cannot be completely excluded. To solve these problems, TDK-EPC developed a wafer-based manufacturing process for EPCOS chip NTC thermistors (Figure 1).
|Figure 1: Wafer for EPCOS NTC thermistors before singulation|
For NTC thermistors, which are manufactured from wafers (Figure 2), the configuration of the electrical terminals is crucial: unlike conventional SMD components, they are not located on the sides of the component, but on its upper and lower surfaces. This allows a direct and very level contact to the semiconductor substrate via the lower terminal. The upper terminal is contacted via conventional bonding. The contact surfaces are optionally available in gold or silver plating for optimal bonding results.
The horizontal arrangement of the terminals on the substrate significantly reduces the risk of fracture and it also makes soldering unnecessary.
|Figure 2: EPCOS Chip NTC thermistor|
Wafer process permits narrower tolerances
The very narrow electrical and thermal tolerances of these NTC chip thermistors are another advantage. This precision is achieved by a special process technology: Before separating the components, the total resistance of the wafer is determined with respect to a rated temperature of 100 °C. The size of the thermistors to be separated is then calculated from this, thus ensuring that the tolerance field of the individual components is very narrowly dimensioned. Figure 3 shows the ∆ values of resistance and temperature referred to the rated temperatures of 25 and 60 °C.
|Figure 3: Resistance and temperature tolerance|
The narrow tolerances and resulting high precision more than meet the demands of semiconductor manufacturers. This enables IGBT modules to be operated at temperatures that are very close to the maximum permissible values.
The B-value of an NTC thermistor and its tolerances are important for its accuracy. In general, the B-value specifies the slope of the R/T curve. The narrower the tolerances of the B-value, the greater the accuracy of the measurement. This relationship is evident in Figure 4, which shows how the resistance and temperature change as a function of various B-value tolerances.
The effects of the B-value on the accuracy of the measurement are shown in Figure 5. It compares a conventional SMD NTC thermistor of case size 0603 with a rated temperature of 25 °C (3 percent B-value tolerance; 5 percent tolerance at R2525) and a chip NTC thermistor with a rated temperature of 100 °C (1 percent B-value tolerance; 3.5 percent tolerance at R25100). It is evident that the chip NTC thermistor offers a significantly narrower and thus better tolerance.
|Figure 5: Comparison of chip NTC and conventional SMD NTC thermistors|
In practice, this means that an IGBT module equipped with an SMD NTC thermistor must be derated at a measured temperature of 120 °C at the latest, as the actual temperature may already have reached the 125 °C value that is critical for the depletion layer in view of its tolerance of ±5 K. On the other hand, the temperature may only be 115 °C and nevertheless make a switch-off necessary. It must also be considered that most SMD NTC thermistors are subject to a resistance drift of up to ±3 percent due to the soldering process, which reduces the measurement accuracy still further.
The scenario is completely different for the chip NTC thermistor: Thanks to its narrow tolerance of only ±1.5 K at 120 °C, no switch-off is needed until the temperature reaches 123 °C. This example shows clearly that the chip NTC thermistors allow IGBT modules to be used right up to their performance limits and thus be better utilized. Currently available chip NTC thermistors can be operated at temperatures of up to 155 °C. The maximum operating temperature can even be extended to 175 °C. At the same time, their B-value tolerances can be narrowed down to 0.5 percent. This also makes chip NTC thermistors ideal for the latest generations of semiconductors such as those based on silicon carbide (SiC).